A Chennai startup got its broadband chip right on the first try
Chennai-based Aheesa Digital Innovations achieved first-pass silicon success with VIHAAN, an indigenous broadband networking SoC. Why getting it right the first time is the whole story.
The Ministry of Electronics and IT announced on Saturday that Aheesa Digital Innovations has achieved first-pass silicon success with VIHAAN, an indigenous broadband networking System-on-Chip built on the VEGA microprocessor.
"First-pass silicon success" is jargon worth unpacking, because it carries the whole story.
Why the first attempt matters so much
A chip design is verified in simulation, then fabricated. Fabrication requires a mask set, and mask sets cost hundreds of thousands to millions of dollars depending on the process node. If the returned silicon does not work, you debug, re-spin and pay again, losing six to twelve months in the process.
Most first attempts fail. Working silicon on the first pass means the design, the verification and the physical implementation were all correct before anyone committed to fabrication. For a startup, that is often the difference between reaching production and running out of money during the second attempt.
VIHAAN is a networking SoC purpose-built for fibre broadband, built on VEGA, the indigenous processor core family developed under India's own microprocessor programme. An Indian core, an Indian design team, an Indian fabless startup, and a chip aimed at infrastructure the country is actively rolling out.
The Tamil Nadu thread
Aheesa is Chennai-based, and the state's fingerprints are on the funding. Earlier this year the company raised roughly ₹40 crore from the Tamil Nadu Infrastructure Fund Management Corporation through the Tamil Nadu Emerging Sector Seed Fund, alongside private investors. The money was aimed at accelerating product development and supporting growth in the semiconductor space.
A state investment vehicle took early equity in a fabless semiconductor company and watched it reach working silicon. For a state building a semiconductor narrative around Chennai, that beats another signing ceremony.
The programme numbers
Aheesa was backed under the Design Linked Incentive scheme, and the ministry used the announcement to lay out the wider picture:
- DLI-supported companies have cumulatively achieved more than 30 chip design tape-outs across various foundries.
- Those companies have collectively raised over $100 million in venture funding.
- Chip design tools have reached 455 organisations, comprising 350 academic institutions and 105 startups.
- Under the Chips to Startup programme, 245 chip designs have been taped out by 71 academic institutions.
The last figure has the longest tail. Tape-outs by academic institutions are not commercial products, they are trained engineers. No country builds a semiconductor industry on fabs alone. It needs people who have taken a design all the way to silicon and watched it fail, which is exactly what 245 academic tape-outs produce.
Keeping the scale honest
India's semiconductor push generates a lot of announcements, and they are worth separating. A memorandum of understanding is an intention. A groundbreaking is a construction schedule. Working silicon from an Indian design team on the first pass is an engineering result, smaller in rupee terms than the fab announcements and much harder to fake.
Aheesa still has to convert this into production volume, design wins with equipment makers, and a second product. First-pass success guarantees none of that. It does prove the team can design a chip that works, and that part cannot be subsidised into existence.